1. Field of the Invention
Apparatuses and methods consistent with the present invention relate to a data management apparatus and method used for a flash memory, and more particularly, to a data management apparatus and method used for a flash memory that can guarantee predetermined response time by expecting when a user will receive a response message regarding his or her request for performing a data operation on the flash memory.
2. Description of the Related Art
In general, home appliances, communications devices, and embedded systems, such as set-top boxes, use non-volatile memories as storage devices for storing and processing data.
Flash memories are one type of non-volatile memory, in which data can be electrically erased and overwritten. Flash memories are suitable for portable devices because they consume less power than magnetic disc memory-based storage mediums, are as accessible as hard discs, and are compact-sized.
Due to the hardware characteristics of flash memories, data recorded on a flash memory is erased in units of blocks, unlike in the conventional random access memory (RAM), nonvolatile storage medium or magnetic storage medium.
In other words, in the flash memories, data is recorded on a sector as a logical operation unit of a host while data recorded on the sector is erased by deleting the overall blocks containing the sector.
Since a unit in which data is recorded on a flash memory is different from a unit in which data is erased from the flash memory, the performance of the flash memory may deteriorate.
In order to prevent the performance of the flash memory from deteriorating for this reason, logical addresses and physical addresses have been suggested.
In other words, to perform data reading or writing operations, predetermined logical addresses are changed into physical addresses of the flash memory through various types of algorithms. In this case, the performance of the flash memory can be maximized by performing mapping in consideration of physical conditions of the flash memory.
Flash memories may include a predetermined memory for storing a mapping table that converts a logical address into a physical address.
The mapping table is generally stored in an SRAM. However, the mapping table may also be stored in a ROM, PROM, EPROM, a cache memory, or a DRAM.
An example of the mapping table is illustrated in FIG. 1. Referring to FIG. 1, the mapping table shows logical addresses and the respective physical addresses.
When repeatedly modifying or erasing data stored in a flash memory, physical addresses of the flash memory at which the data is stored are likely to be changed. The mapping table makes the data stored in the flash memory accessible using the same logical addresses regardless of the change of the physical addresses.
Data stored in a flash memory is accessible using a logical address, which is comprised of a cylinder serial number, a head serial number, and a sector serial number. A logical address LSA may be expressed using Equation (1):LSA=(C*HpC+H)*SpH+S−1  (1)
where C is a cylinder serial number, HpC is the number of heads of each cylinder, H is a head serial number, SpH is the number of sectors of each head, and S is a sector serial number.
As described above, a logical address is converted into a physical address using the mapping table so that a data operation, such as a write operation, is performed on the physical address.
A flash memory is classified into a small-block flash memory or a large-block flash memory. In a small-block flash memory, a logical operation unit is identical to a physical operation unit, while in a large-block flash memory, a physical operation unit is larger than a logical operation unit and thus includes at least one logical operation unit.
A conventional data management apparatus used for a flash memory is illustrated in FIG. 2. Referring to FIG. 2, the conventional data management apparatus includes a user request unit 11, to which a user issues a request for performing a data operation on a flash memory using a predetermined user program and from which the user receives a response message indicating whether the data operation is completed, and a controller 12, which controls a flash device driver 13 so that the data operation can be performed on the flash memory at the user's request.
When writing data to a sector of the flash memory, a block to which the sector belongs may be entirely erased.
Before erasing the block to which the sector belongs, effective sectors of the corresponding block where valid data is stored may be copied to another block.
The erasure of a block and the copying of effective sectors in the block to another block may be performed at least once.
In addition, it is determined how many iterations of erasing a block and then copying effective sectors in the block to another block should be performed in consideration of an internal algorithm of the flash memory.
The operation of the conventional data management apparatus used for a flash memory will now be described in further detail.
A conventional data management method used for a flash memory is illustrated in FIG. 3. Referring to FIGS. 2 and 3, in operation S11, a user issues a request for writing data to a sector of a flash memory to the user request unit 11.
In operation S12, the controller issues a request for performing a predetermined operation for writing data to the sector to the flash device driver 13 in response to the user's request.
The writing of data to the sector may require an operation of erasing a block or writing data to a physical page.
Specifically, the predetermined operation for writing data to the sector may be at least one of copying effective sectors in the block where the sector belongs to another block or erasing the block where the sector belongs.
In operation S13, data is written to the sector in response to a request issued by the flash device driver 13.
In operation S14, if the writing of data to the sector is completed, a response message indicating that the writing of data to the sector is completed is transmitted to the user request unit 11 via the controller 12, and thus the user can recognize the completion of the writing of data to the sector based on the response message.
However, the conventional data management apparatus and method used for a flash memory have the disadvantage that the user cannot imagine what operation has been performed inside the flash memory before writing data to the sector.
In other words, writing data to a sector may be completed by simply writing data to a physical page, as shown in FIG. 4A, or may be completed by performing a plurality of iterations of erasing a block and then writing data to a physical page, as shown in FIG. 4B.
Therefore, it is impossible for the user to expect when he or she will be notified of the completion of the writing data to the sector by receiving a response message because the duration of the predetermined operation for writing data to the sector considerably varies depending on whether and how many times the copying of effective sectors of the block where the sector belongs to another block and the erasing of the block where the sector belongs are performed.
For example, referring to FIG. 5, if the user issues a request for writing data to the user request unit 11, the user request unit 11 simply stands by without performing any operations until it is notified of the completion of the writing of data by receiving a response message.
If it takes 200 microseconds (ms) to write data to a page and it takes 2 milliseconds to erase a block, the user request unit 11 may have to wait for 200 ms to several microseconds or several seconds until it receives the response message.
In short, writing data to sectors of a flash memory using the conventional data management apparatus and method used for a flash memory may end up in different response times, as shown in FIG. 6, depending on an internal algorithm of the flash memory, thus causing problems when processing the flash memory in real time.
In addition, because of such different response times, the conventional data management apparatus and method used for a flash memory may not be able to satisfactorily serve a user's request, thus deteriorating the overall performance of the flash memory.